Toward the end of the 1980s, the semiconductor industry developed the electrically erasable PROM (EEPROM). The result was a new generation of memories targeted at the low-cost, high-density memory market. The term "flash" historically had been used to describe a mode of erasing an entire memory array in a short duration of time, such as one second. Typically, flash memory is programmed by hot electron injection at the drain edge and erased by Fowler-Nordheim tunneling from the source.
Flash memory is classified as nonvolatile memory because a memory cell in the flash memory can retain the data stored in the memory cell without periodic refreshing. Most prior art flash memory can store a single bit in a memory cell. In other words, the memory cell can either store a "1" or a "0."
A prior art flash memory cell is shown in FIG. 1. The memory cell includes a double stack of polysilicon forming a floating gate 101 and a control gate 103. The source side is biased to a voltage V.sub.s and is doubly implanted with an n+ structure formed within an n- base. Typically, the n+ structure on the source side is implanted with arsenic at a dose of 10.sup.16 /cm.sup.2. The n- base on the source side is doped with phosphorous at a dose of 10.sup.14 /cm.sup.2. The drain side n+ structure is biased to a voltage V.sub.d and is doped with arsenic to a dose of 10.sup.16 /cm.sup.2. Typically, the drain side does not have a lightly doped drain structure, which will tend to reduce the electrical field near the drain side and degrade the generation of hot electrons during programming. A tunnel oxide is placed between the substrate and the floating gate 101. The tunnel oxide is typically 80-120 angstroms thick.
Programming of the prior art flash memory cell of FIG. 1 is performed by channel hot electron injection. During the programming operation, the drain voltage V.sub.d is typically biased to 7 volts, the control gate voltage V.sub.cg is biased to 9-12 volts, and the source voltage V.sub.s is grounded. Hot electrons are injected toward the floating gate 101 during programming. One drawback of channel hot electron injection programming is low injection efficiency and the relatively large power consumption during programming. Note also that large voltage biases are necessary to achieve programming.
During the erase operation, Fowler-Nordheim tunneling is used through the source side. The bias during the erase function is typically 0 volts for the drain voltage V.sub.d, 9-12 volts for the source voltage V.sub.s, and the control gate voltage V.sub.cg varies between -9 volts to 0 volts. Thus, a large electric field can be established across the tunnel oxide between the floating gate 101 and the source overlap area of the n- base. Electrons on the floating gate 101 will tunnel into the source n+ structure and be removed.
However, as noted above, the prior art flash memory cell requires relatively high voltage biasing on the terminals of the memory cell which results in relatively high power consumption. Therefore, what is needed is a flash memory cell that can operate with low voltage and low power consumption.